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december 2001 ? highly integrated subscriber line interface kit for pabx and key sys- tem applications implements all key elements of the borscht function integrated zero crossing balanced ringing injection eliminates exter- nal relay and centralised ringing generator zero noise injected on adjacent lines during ringing sequence low power in standby and active modes battery feed with programmable limiting current parallel latched digital interface signalling functions (off hook, gnd-key) low number of external compo- nents integrated thermal protection integrated over current protec- tion 0 c to 70 c: l3234/L3235N -40 c to 85 c: l3234t/L3235Nt description the l3234/L3235N is a highly integrated slic kit targeted to pabx and key system applica- tions the kit integrates the majority of functions re- quired to interface a telephone line. the l3234/L3235N implements the main features of the broths function: - battery feed (balanced mode) - ringing injection - signalling detection - hybrid function the kit comprises 2 devices, the l3234 ringing injector fabricated in bipolar in 140v technology. its function is to amplify and inject in balanced mode with zero crossing the ringing signal. the device requires an external positive supply of 100v and a low level sinusoid of approx. 950mvrms. the L3235N line feeder is inte- grated in 60v bipolar technology. the L3235N provides battery feed to the line with programma- ble current limitation. the two to four wire voice frequency signal conversion is implemented by the L3235N and line terminating and balance im- pedances are externally programmable. the l3234/L3235N kit is designed for low power dissi- pation. in a short loop condition the extra power is dissipated on an external transistor. the kit is controlled by five wire parallel bus and interfaces easily to all the stlc5046 and stlc5048 codecs. in kit with stlc5048 (see fig 1) the line impedance synthesis and echo canceling are performed inside the codec. heptawatt ordering number: l3234 tqfp44 ordering number: L3235N l3234 L3235N highly integrated slic kit targeted to pabx and key system applications 1/25
zac za zb zs=4100 w 43 11 10 9 rx cac il cac 100 m f 6 18 28 32 gdk 31 oh 25 rng 27 sby 3 bgnd 13 v cc cvss cvb cvcc v ss agnd v bat v ss v cc v bat 17239 29 cs vreg base ring 38 30 w tip 40 30 w v bat tip r p1 r p1 ring r p2 20 w r p2 20 w 44 22 20 24 14 35 vpol lim ref gkf rf 39k cf 390nf cr 4.7 m f rlim 9.1k to 35k rr 51k rgf 39k d98tl381 L3235N text mje350 overvoltage protection 82 w 10 m f d1 1n4007 rt 1m w 82 w 10 m f d2 1n4007 34 rtf cgf 390nf 0.1 m f 0.1 m f 0.1 m f puneg tx 12 7 cs 4.7 m f vring stlc5048 io0 io1 io2 io3 io4 io11 io12(cs0) io13(cs1) io14(cs2) io15(cs3) 0.1 m f gnd v cc v cc dx dr fs mclk tsx int res cs cclk co ci vfxi0 100k serial control ports vfro0 100 m f ctx 100nf gnd va 0.1 m f 0.1 m f v100 v cc gnd 63 1 5 4 7 2 l3234 v cc v ee v dd v dd v ss sub vfro1 vfro2 vfro3 vfxi1 vfxi2 vfxi3 0.1 m f abs typical line card application l3234 - L3235N 2/25
description the l3234 is a monolithic integrated circuit which is part of a kit of solid state devices for the sub- scriber line interface. the l3234 sends a ringing signal into a two wires analog telephone line in balanced mode. the ac ringing signal amplitude is up to 60vrms, and for that purpose a positive supply voltage of +100v shall be available on the subscriber card. the l3234 receives a low amplitude ringing sig- nal (950mvrms) and provide the voltage/current amplification (60vrms/70ma) when the enable in- put is active (cs > 2v). in disable mode (cs < 0.8v) the power consumption of the chip is very low (<14mw). the circuit is designed with a high voltage bipolar technology (v ceo > 140v / v cbo > 250v). the package is a moulded plastic power package (heptawatt) suitable also for surface mounting. heptawatt block diagram l3234 solid state ringing injector l3234 - L3235N 3/25
1 2 3 4 5 6 7 d94tl131 out2 v100 out1 gnd vcc cs va pin connection (top view) absolute maximum ratings symbol parameter value unit v100 positive power supply voltage +120 v v cc 5v power supply voltage 5.5 v v a low voltage ringing signal (with v100 = 120vdc) 1.4 vrms cs logical ring drive input v cc t j max. junction temperature 150 o c t stg storage temperature -55 to +150 o c operating range symbol parameter value unit v100 high power supply voltage 95 to 105 v v cc low power supply voltage 5 5% v v a low voltage ringing signal 600 to 950 within 10hz - 100hz vrms t op operating temperature for l3234 0 to 70 c t jop max. junction operating temperature (due to thermal protection) 130 c note: operating ranges define those limits between which the functionality of the device is guaranteed. thermal data symbol description value unit r th j-case r th j-amb thermal resistance junction-case thermal resistance junction-ambient max. max. 4 50 o c/w o c/w pin description pin name description 1 va low voltage ringing signal input 2 cs logical ring drive input 3v cc +5v low power supply 4 gnd common analog-digital ground 5 out1 ringing signal output 6 v100 +100v high power supply 7 out2 ringing signal output in opposite phase with out1 l3234 - L3235N 4/25
5 7 ro1 ro2 out1 2 out2 cs co1 co2 cs line feeder L3235N gnd -vbat tip ring line terminals a b va ringing injector l3234 643 1 ca va c100 cvcc vcc gnd v100 +5v gnd +100v d94tl-L3235N figure 1: l3234/L3235N circuit configuration when the ringing function is selected by the sub- scriber card, a low level signal is continuously ap- plied to pin 1 through a de coupling capacitor. then the logical ring drive signal cs provided by L3235N is applied to pin 2 with a cadenced mode. the ringing cycles are synchronised by the l3234 in such a way that the ringing starts and stops al- ways when the analog input signal crosses zero. when the ringing injection is enabled (cs = "1"), an ac ringing signal is injected in a balanced mode into the telephone line. when the ringing injection is disabled (cs = "0"), the output voltage on out2 raises to the high power supply, whereas on out1, it falls down to ground. the l3234 has a low output impedance when sending the signal, and high output impedance when the ringing signal is disabled in fig. 2 the dynamic features of l3234 are shown. operation description the fig. 1 show the simplified circuit configuration of the l3234 solid state ringing injector when used with the L3235N line feeder. external components list in the following table are shown the recommended external components values for l3234. ref. value involved parameter or function r01, r02 82 w ringing feeding series resistors c01, c02 10 m f - 160v ringing feeding de coupling capacitors ca 4.7 m f - 10v low level ringing signal de coupling capacitor c100 100nf - 100v positive battery filter cv cc 100nf +5v supply filter l3234 - L3235N 5/25
figure 3: test circuit data transmission interference test figure 2: dynamic features of l3234 data transmission interference test the l3234 meet the requirements of the technical specification st/paa/tpa/stp/1063 from the cnet. the test circuit used is indicated below. the measured error rate for data transmission is lower than 10 -6 during the ringing phase. this test measures if during the ringing phase the circuit induce any noise to the closer lines. l3234 - L3235N 6/25
electrical characteristics (test conditions: v100 = +100v, v cc = +5v, t amb = 25c, unless oth- erwise specified) note: testing of all parameter is performed at 25 c. characterisation, as well as the design rule used al- low correlation of tested performance with actual performances at other temperatures. all pa- rameters listed here are met in the range 0 c to +70 c. symbol parameter test condition min. typ. max. unit fig stand by mode: cs = "0" i s (v100) i s (v cc ) consumption va = 950mvrms; 50hz 45 560 100 800 m a m a v sout1 v sout2 dc output voltage va = 950mvrms; 50hz 92 6v v z sout1 z sout2 output impedance 70 70 k w k w 4 z out matching 15 % thd harmonic distortion during emission v line < 6dbm; f = 1khz -46 -40 db 5 ringing phase: cs = "1" dc operation i r (v100) i r (v cc ) consumption z line = va = 950mvrms; 50hz 2.5 2.2 5 3 ma ma v rout1 v rout2 dc output voltage va = 0v 44 44 56 56 v v v ih i ih (cs = 0) threshold voltage on the logical input cs va = 950mvrms; 50hz 2.0 1 v m a 6 v il i il (cs = 0) 0.8 1 v m a i lim dc line current limitation va = 0v 70 150 ma 12 ac operation v out1 /va v out2 /va ringing gain z line = 2.2 m f + 1k w va = 0dbm 29.5 29.5 30 30 db db 7 v out1 -v out1 ringing signal zline = 2.2 m f + 1k w va = 950mvrms; 50hz 57 60 vrms 7 thd v line harmonic distortion va = 950mvrms; 50hz 5 % z in (va) input impedance va = 950mvrms; 50hz 40 k w 8 z out differential output impedance i line < 50marms 20 w 9 test circuits figure 4. l3234 - L3235N 7/25
1 7 82 w 2 cs 4.7 m f line feeder gnd -vbat vout1 a b l3234 6 3 4 zline=600 w ve 1khz vcc v100 d94tl133 5 vout2 82 w 10 m f/160v 10 m f/160v 1m w v test circuits (continued) figure 5. figure 6. figure 7. l3234 - L3235N 8/25
test circuits (continued) figure 8. figure 9. figure 10. l3234 - L3235N 9/25
description circuit description the L3235N subscriber line interface circuit (slic) is a bipolar integrated circuit in 60v tech- nology optimized for pabx application. the L3235N supplies a line feed voltage with a current limitation which can be modified by an ex- ternal resistor (rlim). the slic incorporates loop currents, ground key detection functions with an externally programma- ble constant time. the two to four wires and four to two wires voice frequency signal conversion is performed by the L3235N and the line terminating and the balanc- ing impedances are externally programmable. the device integrates an automatic power limita- tion circuit. in short loop condition the extra power is dissipated on one external transistor (text). this aproach allows to assembly the L3235N in a low cost standard plastic tqfp44 package. the chip is protected by thermal protection at tj = 150 c. the slic is able to give a power up command for combo in off hook condition and an enable logic for solid state ringing injector l3234. the L3235N package is 44 pin plastic tqfp. the L3235N has been designed to operate togheter with l3234 performing complete borsht function without any electromechanical ringing relay (see the application circuit fig. 16). tqfp44 L3235N subscriber line interface circuit 1 2 3 5 6 4 7 8 9 10 17 11 18 19 20 21 22 44 43 42 41 39 40 38 37 36 35 34 28 27 26 24 23 25 33 32 31 29 30 n.c. agnd bgnd n.c. n.c. cac rpc n.c. tx zb za rx v cc ref n.c. n.c. v ss il n.c. vpol n.c. base rtf gkf n.c. n.c. tip v bat ring n.c. n.c. zac vreg n.c. lim rng n.c. sby pu cs n.c. oh gdk n.c. d99tl456 12 13 14 15 16 pin connection absolute maximum ratings symbol parameter value unit v bat battery voltage -54 v v cc positive supply voltage 5.5 v v ss negative supply voltage -5.5 v t j max. junction temperature 150 c t stg storage temperature -55 to +150 c operating range symbol parameter min. max. unit v bat battery voltage -52 -24 v v cc positive supply voltage 4.75 5.25 v v ss negative supply voltage -5.25 -4.75 v t op operating temperature for L3235N 070 c t j max junction operating temperature 130 c note: operating ranges define those limits between which the functionality of the device is guaranteed. l3234 - L3235N 10/25
thermal data symbol description value unit r th j-amb thermal resistance junction-ambient max 60 c/w pin description n name description 1,4,5,8, 15,16,19 ,21,23, 26,30,33 ,36,37, 41,42 nc not connected 2 agnd analog/digital ground. 3 bgnd battery ground. this is the reference for the battery voltage (note 1). 6 cac ac current feedback input. 7 rpc external protection resistors ac transmission compensation. 9 tx four wire transmitting amplifier output. 10 zb non inverting operational input inserted in the hybrid circuit for 2w to 4w conversion. the network connected from this pin to ground shall be a copy of the line impedance. 11 za vrx output buffer 2w to 4w conversion. 12 rx high impedance four wire receiving input. 13 v cc positive 5v supply voltage. 14 ref voltage reference output; a resistor connected to this pin sets the internal bias current. 17 v ss negative 5v supply voltage. 18 il transversal line current feedback divided by 50. 20 vpol non inverting operational input to implement dc character. 22 base driver for external transistor base. 24 lim voltage reference output; a resistor connected to this pin sets the value of line current limitation. 25 rng ringing logic input from line card controller. 27 sby stand by logic input (sby = 1 set line current limitation at 3ma). 28 pu power u.p logic output for the codec filter. (pu = 0 means codec filter activated) 29 cs ring injector enable for l3234 output. (cs = 1 means l3234 ringing injection enable). 31 oh hook status logic output (oh = 0 means off hook). 32 gdk ground key status logic output (gdk = 0 means ground key on). 34 rtf time constant hook detector filter input. 35 gkf time constant gk detector filter input. 38 tip tip wire of 2 wire line interface. 39 v bat negative battery supply input. 40 ring ring wire of 2 wire line interface. 43 zac non inverting input of the ac impedance synthesis circuit. 44 vreg emitter connection for the external transistor. note 1: agnd and bgnd pins must be tied together at a low impedance point (e.g. at card connector level). l3234 - L3235N 11/25
functional description digital interface the different operating modes of the L3235N are programmed through a digital interface based on two input pins: 1)sby input programs the stand-by or ac- tive/ringing modes. 2)rng input programs the ringing on/off acti- vation condition for the l3234. the L3235N digital interface has four output pins : 1)oh provides the on hook/off hook or ring trip informations (active low). 2)gdk provides the ground key on/off informa- tion (active low). 3)pu must be connected to the enable input pin of codec/filter devices like etc 5054/57 and automatically activates this device when in active mode off-hook is detected or when ringing mode is selected. 4)cs output must be connected to the cs en- able input of the solid state ringing injector l3234. in this way the l3234 will be enabled when ring- ing mode is programmed and will be automat- ically disabled when the ring trip condition will be detected reducing the ringing signal disconnec- tion time after ring trip. the table 1 here below resumes the different op- eration modes and the relative logic output sig- nals. the two current detection (hook and gnd key) have internal fixed threshold. externally it is possi- ble to program their time costant through two r-c components connected respectively to pin 26 (rtf) and pin 27 (gkf). L3235N functional diagram l3234 - L3235N 12/25
operating modes stand-by (sby = 1 and rng = 0) in stand-by mode the L3235N limits the dc loop current to 3 ma. in this mode all the ac circuits are active and all the ac characteristics are the same as in active mode. also the two line current detectors (hook and gnd key) are active but due to the loop current limited to 3 ma they will not be activated. this mode is useful in emergency condition when it is very important to limits the system power dis- sipation. ringing mode (sby = 0 and rng = 1) when ringing mode is selected "cs" pin is set to 1 in order to activate the l3234 ringing injector. see l3234 for detailed description. ring trip is detected by means of the same inter- nal circuitry used for off-hook detection. an off-hook delay time lower than 1 2 f ring should be selected. (see ext. components list). when ring trip is detected "cs" is automatically set to "0" allowing in this way a quick ringing dis- connection. after ring trip detection the card controller must set the L3235N in active mode to remove the in- ternal latching of the "cs" information. active mode (sby = 0 and cs1 = 0) in active mode the L3235N has the dc charac- teristic show in fig.13 the dc characteristics of L3235N has two differ- ent feeding conditions: 1)current limiting region : (short loop) the dc impedance of the slic is very high (>20 kohm) therefore the system works as a cur- rent generator. by the ext. resistor rlim con- nected at pin 19 it is possible to program limit- ing current values from 20 ma to 70 ma. 2) voltage source region (long loop). the dc impedance of the L3235N is almost equal to zero therefore the system works like a voltage generator with in series the two ex- ternal protection resistors rp. when a limiting current value higher than 40 ma is programmed the device will automatically re- duce to 40 ma the loop current for very short loop. this is done in order to limit the maximum power dissipation in very short loop to values lower than 2w for the external transistor and lower than 0.5w for the L3235N itself. this improve the system reliability reducing the L3235N power dissipation and therefore the inter- nal junction temperature. table 1. operating mode input pin line status output pin sby rng 0: on hook 1: off hook 0: no gnd key 1: gnd key on oh gdk pu cs active 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 ringing 0 0 0 0 1 1 1 1 0 0 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 0 0 0 1 0(*) 0(*) 0(*) stand-by 1 1 0 1 x x x x 1 1 1 1 1 0 0 1 (*)this status is latched and doesnt change until rng turn to 0 l3234 - L3235N 13/25
ac transmission circuit stability to ensure stability of the feedback loop shown in block diagram form in figure 13 two capacitors are required. figure 14 includes these capacitors cc and ch. ac - dc separation the high pass filter capacitor c ac provides the separation between dc circuits and ac circuits. a cac value of 100mf will position the low end fre- quency response 3db break point at 7hz, fsp = 1 2 p 220 w c ac figure 11: dc characteristic in active mode with two different values of limiting current (30ma and 70 ma). figure 12: line current versus loop resistance with two different values of limiting current (30ma and 70ma) l3234 - L3235N 14/25
ac characteristic a simplified ac model of the transmission circuits is shown in figure 13 where: v rx is the received signal v tx is the transmitted signal v l is the ac transversal voltage in line e g is the line open circuit ac voltage z l is the line impedance r p are the protection resistors zb is the line impedance balancing network z a is the slic impedance balancing network z ac programmable ac line termination impedance r pc used for external protection resistors insertion loss compensation i l /50 is the ac transversal current divided by 50 cac ac feedback current decoupling ac behavior the ac path simplified formulas, that are valid when il/50 is equal to il/50, are the following : two wire impedance the impedance presented to the two wire by the slic including the protection resistors rp and defined as zs is equal to : zs = zac/12.5 + 2rp i.e. with zac = 6250 w and rp = 50 w zs = 600 w two wire to four wire gain the transmission gain , gtx, of the slic is equal to : gtx = vtx / vl gtx = 0.25 * (rpc + zac) / (25rp + zac) using rpc = 25rp , as recommended to compensate the protection resistor rp, gtx = 0.25 (-12 db) four wire to two wire gain the receiver gain , grx, of the slic is equal to: grx = vl / vrx grx = 50zl / (zac +12.5(zl + 2rp)) using zac = 12.5(zs - 2rp) and assuming zl = zs we have the following gain: grx = 2 (+6 db) hybrid function the transybrid loss, thl, is equal to: thl = v tx / v rx thl = z b / (z a + z b )-(z ac +r pc ) / (z ac + + 12.5(2r p + z l )) using z ac = 12.5(z s - 2 rp ) and r pc = 25r p we have the following relation: thl = z b / (z a + z b ) - z l / (z l + z s ) to maximize the hybrid attenuation the imped- ance must be matched, z a / z b = z s / z l , to guarantee thl = 0. from the above relation it is evident that if z s is equal to the z l in thl test the impedance z a and z b can be substituted by two equal resistors. il/50 tx cac + - 1 rx - + tip ring vrx vtx zb za zac rpc 12 9 10 11 43 7 38 40 6 18 cac il e g rp rp zl L3235N x2 +1 -1 il'/50 vl figure 13. l3234 - L3235N 15/25
external components list for L3235N to set the slic into operation the following parameters have to be defined: - the ac slic impedance at line terminals "zs" to which the return loss measurements is referred. it can be real (typ. 600 w ) or complex. - the equivalent ac impedance of the line "zl" used for evaluation of the trans-hybrid loss performance (2/4 wire conversion). it is usually a complex impedance. - the value of the two protection resistors rp in series with the line termination. once, the above parameters are defined, it is possible to calculate all the external components using the following table. the typical values has been obtained supposing: zs = 600 w ; zl = 600 w ; rp = 50 w name suggested value function formula r f c f 39k w 390nf delay time on-hook off-hook t = 0.69 c f 39k w (1) r gf c gf 39k w 390nf delay time gk detector t = 0.69 c gf 39k w r r 51k w bias set r lim 8.4k w to 33k w ext. current limit. progr. r lim = 564 i lim - 3ma cr 4.7 m f 6.3 v 30% negative battery filter c ac = 1 2 p 16k w fp r p 50 protection resistors 47 < r p < 100 w (2) r t 1m w 20% termination resistor c ac 100 m f 6.3v 20% dc/ac current feedback splitting c ac = 1 2 p 220 w f sp r pc 1250 w 1% r p insertion loss compensation r pc = 12.5 (2r p ) z ac 6250 w 1% 2w ac impedance programmation z ac = 12.5 (z s - 2r p ) c c 470pf 20% ac feedback compensation f1 = 300khz c c = 1 2 p f1 25r p z as 12500 w 1% slic impedance balancing net. z as = 25 (z s - 2r p ) r as 2500 w 1% ras = 25 (2r p ) zb 15k w 1% line impedance balancing net. z b = 25 zl c h 220pf 20% c c transybrid loss compensation c h = c c z ac z as c tx 4.7 m f 30% dc decoupling tx output c tx = 1 6.28 fp z load d1, d2 1n4007 line rectifier text (3) external transistor p diss > 2w, v ceo > 60v h fe > 40, i c > 100ma v be < 0.8v @ 100ma cv ss ; cv dd 100nf 5v supply filter c vb 100nf/100v v bat supply filter notes: 1) for proper operation cf should be selected in order to verify the following conditions: a) cf > 150nf b) t < 1/2 f ring f ring : ringing signal frequency 2) for protection purposes the rp resistor is usually splitted in two part r p1 and r p2 , with r p1 > 30 w . 3) ex: bd140; mje172; mje350.... (sot32 or sot82 package available also for surface mount). for low power application (reduced battery voltage) bcp53 (sot223 surface mount package) can be used. depending on application enviroment an heatsink could be necessa ry. l3234 - L3235N 16/25
figure 13: typical appication circuit including l3234 and protection l3234 - L3235N 17/25
electrical characteristics (test condition: refer to the test circuit of the fig. 16; v cc = 5v, v ss = -5v, v bat = -48v, t amb = 25 c, unless otherwise specified) note: testing of all parameters is performed at 25 c. characterization, as well as the design rules used allow correlation of tested performance with actual performance at other temperatures. all pa- rameters listed here are met in the range 0 c to +70 c. symbol parameter test condition min. typ. max. unit fig. stand-by v ls output voltage at tip/ring pins i line = 0 35.7 39 v i lcc short circuit current stand-by, sby = 1 2 3 4 ma dc operation v lp output voltage at tip/ring pins i line = 0 i line = 50ma 35.7 35.2 39 39 v v i lim current progr. i lim prog. = 70ma 63 70 77 ma i lim current progr. 8.4k w < r lim < 33k w 20 70 ma i o on-hook threshold 5 ma i f off-hook threshold 10 ma i lgk gk detector threshold 10 17 ma gklim ground key current limitation ring to bgnd 13 22 ma gkov ground key threshold overloap gklim-ilgk 1 ma i max max. output current at tip/ring i lim = 70ma 90 140 ma iv cc supply current from v cc i line = 0 6.2 8 ma iv ss supply current from v ss iline = 0 1.6 2.1 ma iv bat supply current from v bat iline = 0 2.8 3.6 ma ac operation z tx sending output impedance pin 9 (tx) 10 w z rx receiving input impedance pin 12 (rx) 1 m w r l 2w return loss f = 300 to 3400hz 22 36 db a1 thl trans hybrid loos f = 300 to 3400hz 22 36 db a2 g s sending gain f = 1020hz i l = 20ma -11.9 -12.1 -12.3 db a3 g sf flatness f = 300 to 3400hz -0.2 0.2 db g sl linearity -20db to 10dbm -0.2 0.2 db g r receiving gain f = 1020hz i l = 20ma 5.8 6 6.2 db a4 g rf flatness f = 300 to 3400hz -0.2 0.2 db g rl linearity -20dbm to +4dbm -0.2 0.2 db np4w psoph. noise at tx -90 -78 dbmp np2w psoph. noise at line -82 -70 dbmp s vrr relative to v bat versus line terminal versus tx terminal f = 1020hz v s = 100mvpp -30 -24 db db a5 s vrr relative to v cc and v ss versus line terminal versus tx terminal f = 1020hz v s = 100mvpp -20 -14 db db l tc l/t conversion measured at line terminals f = 300 to 3400 i line = 20ma 49 53(*) db db a6 t lc t/l conversion measured at line terminals f = 300 to 3400 i line = 20ma 46(*) db a7 (*) selected parts L3235Nc l3234 - L3235N 18/25
L3235N figure 14: test circuit electrical characteristics (continued) symbol parameter test condition min. typ. max. unit fig. digital static interface v il input voltage at logical "0" input sby, cs1 0 0.8 v v ih input voltage at logical "1" input sby, cs1 2 5 v i il input current at logical "0" input sby, cs1 10 m a i ih input current at logical "1" input sby, cs1 10 m a v ol output voltage at logical "0" i out = 1ma i out = 10 m a 0.5 0.4 v v v oh output voltage at logical "1" i out = 10 m a i out = 1ma 4 2.7 v v l3234 - L3235N 19/25
appendix a L3235N test circuits referring to the test circuit reported in fig 16 you can find the proper configuration for the main measurements. in particular: a-b: line terminals c: tx sending output on 4w side d: rx receiving input on 4w side figure a1: 2w return loss figure a2: trans-hybrid loss r l = 20 log | z ml - z | | z ml + z | = 20 log | 2v s | | e | figure a3: sending gain t hl = 20log v s v r 100 m f 100 m f 100 m f 100 m f 100 m f 100 m f l3234 - L3235N 20/25
test circuits (continued) figure a4: receiving gain figure a5: svrr relative to battery voltage vb figure a6: longitudinal to transversal conversion 100 m f 100 m f 100 m f 100 m f l3234 - L3235N 21/25
appendix b layout suggestions standard layout rules should be followed in order to get the best system performances: 1) use always 100nf filtering capacitor close to the supply pins of each ic. 2) the L3235N bias resistor (rr) should be connected close to the corresponding pins of L3235N (ref and agnd). figure a7: transversal to longitudinal conversion l3234 - L3235N 22/25
dim. mm inch min. typ. max. min. typ. max. a 4.8 0.189 c 1.37 0.054 d 2.4 2.8 0.094 0.110 d1 1.2 1.35 0.047 0.053 e 0.35 0.55 0.014 0.022 f 0.6 0.8 0.024 0.031 f1 0.9 0.035 g 2.41 2.54 2.67 0.095 0.100 0.105 g1 4.91 5.08 5.21 0.193 0.200 0.205 g2 7.49 7.62 7.8 0.295 0.300 0.307 h2 9.2 10.4 0.362 0.409 h3 10.05 10.4 0.396 0.409 l 4.6 5.05 0.181 0.198 l1 3.9 4.1 4.3 0.153 0.161 0.170 l2 6.55 6.75 6.95 0.253 0.265 0.273 l3 5.9 6.1 6.3 0.232 0.240 0.248 l5 2.6 2.8 3 0.102 0.110 0.118 l6 15.1 15.8 0.594 0.622 l7 6 6.6 0.236 0.260 m 0.17 0.32 0.007 0.012 v2 8 (max) dia 3.65 3.85 0.144 0.152 heptawatt (surface mount) april 1999 outline and mechanical data l3234 - L3235N 23/25
tqfp44 (10 x 10) dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.30 0.37 0.45 0.012 0.014 0.018 c 0.09 0.20 0.004 0.008 d 12.00 0.472 d1 10.00 0.394 d3 8.00 0.315 e 0.80 0.031 e 12.00 0.472 e1 10.00 0.394 e3 8.00 0.315 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.039 k 0 (min.), 3.5?(typ.), 7 (max.) a a2 a1 b seating plane c 11 12 22 23 33 34 44 e1 e d1 d e 1 k b tqfp4410 l 0.10mm .004 outline and mechanical data l3234 - L3235N 24/25
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the cons equences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com l3234 - L3235N 25/25

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